Synchronous teletypewriter mixer



Sept. 28, 1954 E. R. GAUL n, ET AL syNcHRoNoUs TELETYPEWRITER MIXER 8 Sheets-Sheet l Filed April 17, 1955 Septt 28, 1954 E. R. GAUL n. ET AL sYNcHRoNoUs TELETYPEWRITER MIXER 8 Sheets-Sheet 2 m wwwww Filed April 17, 1955 Sept 28, 1954 E. R. GAUL 1|, ET AL 2,690,475

SYNCHRONOUS TELETYPEWRITER MIXER Filed April 17, 1953 8 Sheets-Sheet 3 AAAA Sept 28 1954 E. R. GAUI. u, ET AL 2,690,475

SYNCHRGNOUS TELETYPEWRITER MIXER Filed April 17, 1955 8 Sheets-Sheet 4 fe; v

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8 Sheets-Sheet 5 Sept. 28, 1954 E. R. GAUL. u, ET AL SYNCHRONOUS TELETYPEWRITER MIXER Filed April 17, 1953 5,6/0 aF *N navi -w-l 8 Sheets-Sheet 6 Sept. 28, 1954 E. R. GAUL u, ETAL SYNCHRONOUS TELETYPEWRITER MIXER 8 Sheets-Sheet 7 Filed April 17, 1953 llllllll #TI-V255@ I (f1 @W MW Sept. 28, 1954 E. R. GAUL. u, ETAL 2,590,475

sYNcHRoNoUs TELETYPEWRITER MIXER Filed April 17, 1955 8 Sheets-Sheet 8 Patented Sept. 28, 1954 SYNCHRNQUS TELETYPEWRITER lWIXERy Edward n. Gaul n, san Amonio, ealifglfniaV Leigh A. Brite, Kent, Ohio Application April 17. 1953 Seriali N0,-Y 343,580;-

1v The invention described herein may be manufactured and used by or for the United States Government for governmental purposes without payment to us of any royalty thereon.

This invention relates to teletypewriter systems 'and particularly to such systems employing online enciphering and deciphering of the transmitted message.

In conventional cryptographic teletypewriter systems the transmission of a message originates with the transmitter-distributor unit. rihis unit generates a series of teletypewriter signals by the passage ofv a tape therethrough which has previously been punched in accordance with the message. Each teletypewriter signal or character group represents a character in the message and consists of a combination of seven sequentially occurring pulses, each pulse being one `of two possible distinguishable types termed mark and space The firstpulse ofy a character group is designated the start pulse and is always a space. Thelast pulse of the group is designated the stop pulse and is always a mark, The five intermediate pulses occur in various combinations of mark and space andv may represent any of the thirtytwo characters of the standard teletypewriter keyboard.

The clear text character groups from the transmitter-distributor are applied to the transmit cryptographic unit which converts each group into an enciphered character group. The transmit cryptographic unit accomplishes this by mixing the iive character pulses ofeach text group with five character pulses representing a cipher group. The cipher groups, like the text groups in the transmitter-distributor unit, are recorded on a punched tape Which passes through the transmit cryptographic unit in synchronism with the tape in the transmitter-distributor unit. lThe mixing process follows the rule of signs in algebraic multiplication, considering a mark positive and a space negative (T), so that S. X S eM The following is a specic example of the encipheringprocess. at the transmitter:

Sv M S M S M M text character group Y M M S S S cipher character "A HM'A S` `Sl transmittedenciphcred group D Qnly the five character representing pulses are involved in the process, the start pulse (space) and, Step. pulse (merk) that Complete e Character group remain unchanged The haracters form- Y ing the cipherfgroups. on the cipher tape may, of course, comprise anyV number of: the. thirty-two standard characters arranged in any desired se.- quence.

The enciphered` teletypewritersignal obtained as above.l may be transmitted over any suitable transmission link to the. receiving station. At the receiving station the enciphered teletypewriter signal is applied to a receive cryptographic unit which is supplied,v with a cipher tape identical to that of the transmit cryptographic unit. A mixing process between the received enciphered character groups and the locallyv supplied cipher groups. takes place in the receive cryptographic unit. This process is the. same as the mixing process at theitransmitter and results in. each enciphered character group: being converted into the original text character group. The fol-lowing is a specic example of thedeciphering processV at the receiver:

S M S S M S M received enciphered group D M M., S S S s M s M, SM Mv texrcharacrerw The deciphered character groups obtained from the. receive crypto unit may be` applied to a teletypewriter printer for reproduction of the clear text.

It is clear that in the above system the receive cryptographic unit must always be maintained in step with the transmitter-distributor and transmit crypto units, for otherwise each enciphered character group arriving at the receive cryptographic unit would be. mixed with al cipher group diiierent from the cipher group used at the transmit cryptographic unit which wouldl result in a decoding error. Conventional systems have relied upon the start pulseV of each character group to maintain synchronization between the TD: unit and the. transmit and; receive cryptographic units in addition to its usual function of synchronizing the printer.4 This method has the disadvantage that tailure ofthe transmission link only to the extent Qf; mg: a single startk pulse Causes the receive cryptographic unit to` fall behind the transmit eryptesraphie unit by one step and results in a garbled output from that time, since the. receive cryptographic unit has no way of legainins the..Y 10st Step.. Also. the serleratiexiL of a false start pulse by a disturba,nce in the transmissionaris causes the. receive cryptographie unit te advance one. Step. ahead 0f the. transmit; cryptographie unit, which likewise results in a continuous deeednsenter fren-1 the time ef the disturbagee until the. elette be resynehronz d:- te.teniirlsl-y,` it is Seen that eenventienal eri-line cipher character group A d. cryptographic systems require a transmission link of exceedingly high quality for reliable operation.

It is therefore the principal object of this invention to provide a teletypewriter system ernploying on-line cryptographic equipment in which means are provided for maintaining synchronization between transmit and receive cryptographic units during periods of failure of the transmission link. Briefly, this is accomplished by providing identical frequency standards at both the transmit and receive stations. At the transmit station step pulses are derived from the frequency standard to control the operation of the transmitter-distributor and transmit cryptographic units. During periods of normal transmission the teletypewriter signal arriving at the receive station is used to synchronize the operation of the receive cryptographic unit with that of the transmit cryptographic unit and also to maintain synchronization between the receive frequency standard and the frequency standard at the transmit station. During periods of transmission link failure when there is no received teletypewriter signal the receive cryptographic unit nevertheless continues to be stepped in unison with the transmit cryptographic unit by means of step pulses derived from the receive frequency standard. The length of time during which synchronization may be maintained depends upon the natural frequency stability of the frequency standards, periods up to one-half hour or more being easily attainable. Upon restoration of the transmission link the received teletypewriter signal again takes over the function of stepping the receive cryptographic unit and also corrects any drift of the receive frequency standard relative to the transmit frequency standard that may have occurred during the break.

The details of a teletypewriter system employing the above described method of synchronization will be described in connection with the accompanying drawings, in which Fig. 1 is a block diagram of a teletypewriter station in accordance with the invention;

Fig. 2 is a schematic diagram of the transmitter portion of the teletypewriter station in Fig. 1;

Figs. 3a and 3b show a schematic diagram of the receiver portion of the teletypewriter station of Fig. 1; and

Figs. 4 9 show waveforms appearing at various points in the teletypewriter station circuits.

In the following description TT Will be used for teletypewriter, TD for transmitter-distributor, crypto for cryptographic and line for transmission link either land circuit or radio, in accordance with accepted practice in the art. Also the TD unit, the transmit and receive crypto units and the printer unit shown or indicated in the drawings are standard rI'T units and will not be described in any more detail than is necessary for an understanding of the invention. Detailed descriptions of these units are readily available in the technical literature on TT systems such, for example, as the Army Manual TM 11-680, Teletypewriter Circuits and Equipment, available from the Superintendent of Documents, Washington, D. C.

Fig. 1 shows a functional block diagram of a TT station incorporating the invention while Figs. 2, 3c and 3b show the circuit details of Fig. l. The circuit which interconnects the standard TD, transmit crypto, receive crypto and printer units consists of three sections, namely,

the frequency standard generator H, the transmitter i2 and the receiverY i3, as shown in Fig. 1. Outgoing cryptographic messages are sent over transmit lines ifi to a distant TT station and incoming cryptographic messages are Yreceived over receive lines i5 from the distant station. The cooperating distant TT station is identical to that shown in Fig. 1.

The frequency standard generator has two major functions. One is to supply 5.7 C. P. S. pulses to the transmitter for use in synchronizing the transmit crypto and TD units. The other is to supply Q53 C. P. S. pulses to the receiver for use in synchronizing the receive crypto unit during a line break. The frequency standard generator may be of any suitable type having the required frequency stability and capable of producing square waves having frequencies of 45.8 C. P. S. and 5.7 C. P. S. as shown in Figs. 4(11) and (b). The generator shown comprises a tuning fork controlled master oscillator operating at 1650 C. P. S. andrsufficient binary and ternary dividers to reduce this frequency to the above designated values.

The 5.7 C. P. S. square wave has a period of ms. (milliseconds) which is equal to the time duration of the TT character group used in this system and shown in Fig. 4(e). This character group differs from the standard TT character group only in that the stop pulse is 12 ms. longer, thus increasing the total duration of the group to 175 nis. as compared to 163 ms. for the sta-ndard group. The reason for the longer stop pulse is as follows: In conventional TT systems the TD unit runs continuously until a complete message has been sent. In the present system, however, a timed pulse, derived from the frequency standard, starts the TD unit each time a character group is transmitted, the unit stopping at the end of each group. The extra time required for this intermittent operation is added to the last or stop pulse of the character group.

The principal purpose of the transmitter section l2 is to synchronize the operation of the TD and transmit crypto units. The transmitter section itself may be broken down into three sections, namely, the stepping Section, the signal section and the disable section, each serving a different purpose. The stepping section provides pulses of approximately 22 nis. time duration at 175 ms. intervals to operate the release mechanisms of both the TD and transmit crypto units. The signal section generates and controls the information sent to the transmit lines. The disable section prevents transmission of the transmit crypto units cipher when there is no signal coming from the TD in order to maintain code security.

The TD step circuit i e of Fig 1 comprises tubes ViA, VlliB, VSfaSB, TD step relay K362i and bias control relay KEli of Fig. 2. The object of the TD step circuit is to produce a series of 22 ms. current pulses, as shown in Fig. 4(c), in the release magnet of TD unit l. The leading edges of these pulses are coincident with the positivegoing edges of the frequency standard square wave output shown at a, and each initiates a cycle of operation of the TD. The step pulses are generated as follows:

Tubes VBDIA and VSEHB normally conduct heavily due to the fact that the grid of each is normally slightly positive relative to its associated cathode. The 57 C. P. S. square Wave, Fig. 4(1)) from the frequency standard, is applied to the grid of tube ViA. The positive half-cycles of this wave cannot raise the potential of the grid appreciably due to the action of limiting resistor RSM, however the negative half-cycles drive the tube into cut-off thus producing positive rectangular pulses on its anode. During these positive anode pulses condenser CSM charges, but the potential of the grid or tube V33EB is prevented from rising appreciably in potential by the action of limiting resistor R336. At the negative-going edge of the positive pulse on the anode of tube IilA the anode potential drops sharply, allowing condenser C3il| to dis charge through resistors R333, R335 and R395 which lowers the potential of the grid of tube VSEHB far below cut-off and causes a sharp rise in its anode voltage. As condenser 033| discharges the potential of the grid of tube V|B rises toward cut-off at which point conduction in the tube is resumed and the anode potential drops. Since only a small increase in grid voltage above the cut-off valve is required to produce the normal heavy conduction in tube VSGIB the foregoing process produces a substantially rectangular positive voltage pulse at its anode. The length of the pulse is determined by the time constant of the discharge circuit of condenser Ci which may be varied by adjusting resistor R334, The circuit is normally adjusted tc produce a pulse of about 22 ms.

The release magnet of TDH has on-off switch SW3, with contacts I- of relay Kil, end of tape switch E30 and tape stop switch Il in series therewith. When a tape is in position in the TD unit and when the equipment is otherwise ready for cipher operation all of these switches are closed so that a circuit is completed from positive terminal m2 through the coil of relay K133i, resistor 1332i, resistors R253 and RIM, switch SW3, contacts l-6 of K143i, the release magnet, and switches H30 and lili to negative terminal w3. The current flow through this circuit is insuilcient to operate the release magnet but does operate relay KBGI to its lower contact. Tube V303B is normally biased beyond cut-oii by the voltage across condenser C305. Operation of relay K3i grounds resistor R322 which allows condenser C305 to discharge and the voltage on the grid of tube V303B to rise. The time constant of the discharge circuit is made such as to require about two seconds for the grid potential to rise to an operative value after closure of the various switches in series with the TD release magnet.

The 22 ms. positive pulse on the anode of tube V3HB is applied to the grid of tube V363B and, when this tube is biased to an operative point, causes a 22 ms. pulse of current to flow through the winding of TD step relay E392. Operation of this relay short circuits the winding of relay K133i and resistor 532i making a direct connection from positive terminal 32 to resistor R254. This removal of resistance from the TD release magnet circuit allows the current therein to rise above the value required to operate the release mechanism and initiate a cycle of operation of the TD. During the 22 ms. period relay E30! is deenergized and condenser C335 is free to recharge to its former higher voltage. However the 22 ms. interval is so short relative to the time constant of the condenser charging circuit that no appreciable change in voltage thereacross occurs, and the grid of tube V3D3B remains at its operative bias potential during transmission of a message.

The function of the crypto step circuit I8 is tol generate a 22 ms. current pulse for stepping the transmit crypto unit. This pulse should lag the TD step pulse by 22 ms. as shown in Fig. 401). The crypto step circuit comprises pulse generator stage V302A, clamper stage V332B, relay driver stage V303A and transmit crypto step relay K211i. In positions E and 2 of bank iB of switch S2M positive potential is applied to the grid of tube V302B which causes this tube to conduct heavily and to clamp the anode of tube V332A near ground potential so that this stage is inoperative. Further when the anode of V3=2A is clamped at a low potential tube V303A is cut off by the negative bias potential applied to its grid. When switch bank IB is thrown to positions 3 or a negative potential is applied to the grid of tube V302B which cuts this tube off and unclamps the anode of stage V302A, rendering the stage normally operative. However it is not desirable that unclamping occur instantaneously for reasons to be pointed out later. Accordingly the time constant of the circuit 02m-R232 has such a value that about two seconds elapses from the time switch bank IB is thrown to position 3 or 4 until tube V302B is cut 01T.

The 22 ms. positive pulses on the anode of stage VSQIB in the TD step circuit are applied to the grid of tube V332A. These pulses coincide 'with the pulses shown in Fig. 4(0). Assuming switch bank iB in position 3 and stage V332A unclain-ped, the operation of `this stage is similar to that of stage VtiB. Tube V332A normally `conducts heavily since its grid is connected to positive potential and, due to the 'drop in resistors R333 and R333, assumes a potential slightly above that of the cathode. During a positive pulse on the anode of VSGIB condensers C332 and C333 charge to a higher voltage, however the conduction in tube V3G2A is not appreciably affected since the grid of this tube cannot be driven to an appreoiably higher potential due to grid current drop across resistors R333 and R303. t the trailing negative-going edge of the pulse the sharp drop in the anode potential of tube VSGIB together with the increased negative voltage across condensers C302 and C333 drive tube V332A into cut-oir causing a sharp rise in its anode potential. As condensers C332 and C333 discharge through resistors R301 and R338 the grid of V302A rises toward cut-off and after reaching this point full conduction in the tube soon recurs with a sharp drop in anode voltage. The time constant of the discharge circuit is so selected that the positive pulse so formed on the anode or" tube VSQZA has a duration of approximately 22 ms. The leading edge of this pulse is delayed relative to that of the pulse on the anode of V30 IB by the duration of the latter pulse, which is approximately 22 ms. The positive pulse on the anode of VSSZB is applied to the grid of V303A and causes a coincident ow of current through the winding of crypto step relay KZi. Energization or this relay closes contacts i-l' and results in coincident current iow through release magnet IEM of transmit crypto unit i9. These crypto step pulses lag the pulses on the anode of V30iB, and therefore the TD step pulses in the TD release magnet which are coincident therewith, by 22 ms. The construction of the TD and crypto units is such as to require this phase difference in step pulses y for synchronous operation of the two units.

The TD unit il operates in conjunction with TD signal relay Km2 to convert the character groups recorded on the tape which passes through the TD unit into electrical pulse character i groups, `such as shown in Fig. sie) which appear at .1202. TD unit 11 is a standard unit the construction and operation of which is well understood in the art and therefore need lnot be described in detail here. Briefly, however, ras seen in Fig. 2, it comprises an inner segment 165, a stop segment represented by the Vertical arrow .beneath the segment :at the left, and five character pulse segments vand contacts represented by the remaining five arrows. The inner segment 'M5 is connected to terminal 4 of TBII'H. The stop segment is permanently connected to terminal 3. The punchin'gs .in the tape determine which of the character segments are connected vto terminal 3, the mechanism .for accomplishing this not being -shown in the drawing. A brush, also not shown, is .set in motion by the release magnetand bridges the gaps between the inner segment 'and the character and stop segments in succession, 'the drawing indicating the -gap between inner and stop segments being bridged. The nal .result .is that a mark is represented by a connection between terminals 345 of TBIUI and a space by an open circuit between these terminals. Terminals 3-1 .are connected in series with coil 2 3 of relay K2 92 and a source of direct potential. When a connection is made between terminals 3-4 of TBIUI coil 2-3 of relay K202 is energized closing contacts G-I of the relay and producing a positive voltage or mark vpulse at 3202. Breaking the connection between terminals 3.-4 of TBSI deenergizes coil 2 3 of relay X292 and allows continuously energized coil I-B to close contacts of the relay. This produces zero voltage or a space pulse at J 202.

The transmit crypto unit I9 operates in conjunction with mixer relay E293 to convert the clear text TT signal produced by the TD unit into an enciphered TT' signal. The transmit crypto unit, like the TD unit, is a standard item the construction and operation of which is understood in the art and need not be described in detail here. Briefly, however, as shown in Fig. 2, it comprises an inner segment lit, active segments numbered I 5, start segment It?, stop segments K le@ and a number of inactive segments. Brush Ill-S is set in motion by the crypto step pulse, applied to release magnet IIJ-e, at the proper time to'move in synchronism with the brush of the TD unit, so that the brush 09 is at the center of each of active contacts I- at the same time that the TD brush `at the center of the corresponding one of its five character segments. Each of the active segments I--5 is connected to terminal 5 of the crypto unit for a space or to terminal `l for a mark by suitable contacts associated with each as shown in the drawing. These contacts `are actuated to either the mark or the space coni dition by the cipher tape at the same time that the character segment contacts of the TD unit are actuated by the message tape. The clear text TT signal appearing at J2Ii2 is applied to inner segment IB of the crypto unit. The arrangement is such that, when brush I09 is on any oneof the active segments I-5, one -of the The start segment III'I of the crypto unit is permanently connected to terminal Il and is therefore the 'equivalent of an active segment set for a mark. Since the crypto brush is on the start segment at the same time that the TD brush is on the TD start segment, which always produces a space, the result is the same as for condition (3) above, and a space is produced by relay K203. At the end of its cycle of operation the crypto brush passes over the stop `segments and stops on the inactive rest segment. In passing over the stop segments voltage is app-lied directly to relay K2IJ3 Vto produce a mark.

The operation of the crypto unit and associated circuits is illustrated more accurately by wave forms (i) and (7') in Fig. 4. Wave form (i) represents the voltage at J2Il2 and wave form (i) the voltage at J2Il3 when all of the active contacts I-E of the crypto unit are set for mark. With this setting the enciphered TT signal is the same as the clear text TT signal.. The brush of the TD unit requires 22 ins. to pass over each of its segments, however the brush of the crypto unit requires only fi ms. to pass over each of the active segments of the crypto unit. Assume that a cycle of operation has just begun in both TD and crypto units. In this case the TD `brush has just started to move over the start segment and the crypto brush has just started to move 01T the inactive rest segment 'toward the start segment. Contacts owl' of relay 'KNS are still closed for the stop pulse of the preceding character group. Nothing happens until the crypto brush reaches the start segment. At this point current Viiows from positive terminal II) through Ri I l, RI I4, terminals 2-3 of relay K23, terminal 4 of crypto unit, start segment It?, inner segment 66, contacts 1 6 of relay X282 which are closed during a spaca'and R2 I 3 to negative terminal I H. This current owing thrcugh coil 2*-3 of relay K23 overcomes the iiux produced by holding coil I-8 and closes contacts 6-6 of this relay. Although the current 'dow lasts for Vonly 4 ms., contacts E-v-f remain closed dueto the holding current now nowing from positive terminal H2 through R229, terminals 3-I of the holding coil, R22I, contacts `i---S and R222 to negative terminal I I3. rThe closure of contacts 6--5 produces Zero 'or space voltage at J 293. The 4 ms. current flowing through resistor' REI? produces a small voltage drop across this resistor which is seen as a 4 ms. vpositive pulse'in the center of the start pulse at 5292. Nothing further hap-pens until the crypto brush reaches active segment I, which requires 22 ms., after leaving the start segment. Before this time the TD brush has already reached the first character segment and caused contacts -'I of relay F1222 to close producing positive or mark voltage at 5292. Current now flows from positive terminal IIA through R2I8, contacts I--e of relay Kw2, inner segment |66 of the crypto unit, active segment I, terminals 3-2 or relay K20'3, .RI Ill VandR'IIZ to negative terminal II5. This Il ms. current, which flows 'in the opposite direction to the preceding current, overcomes the eiie'ct of holding coil l--i and closes contacts -l of the relay. This current also produces a slight increase in Voltage drop across resistor REIS and accounts for the small 4 ms. negative-going pulse in the center of the pulse #I at JZQZ. Holding current now flows 'from positive terminal I'I 6 through R223, contacts I--6, R22 I, terminals 'I-QB and R2 I 9 to negative terminal Ill thus holding contacts 6--7 closed after cessation of the 4 ms. current. Closure of-con- 9 tacts 6 1 produces positive or mark voltage at .1203.

. The above process continues in a similar manner throughout the character group. Since pulse #t is indicated as a mark, contacts 6 7 oi relay K203i are already closed when the crypto brush reaches the stop segment and no action takes place. lt is seen that the diierence in size between the active segments of the crypto and the TD units results in a 9 ms. delay of the enciphered TT signal at J 203 relative to the clear text TT signal at J 202. This delay is of no consequence in the operation of the TT system. The small i ms. pulses appearing at J202 are referred to as sampling pulses and serve a useful purpose in that they serve to indicate the accuracy of the synchronization between TD and crypto units. With proper synchronization of the two units the sampling pulses appear in the exact center of the broader TD pulses.

The TT signal output of mixer relay K203 is applied to the signal winding 2 3 of line relay X205 when bank 3d of 520i is in positions 2 or 3. The line relay is designed for either neutral or polar operation. For neutral operation the line is connected to terminals 1 8 of TB|0| with 15H32 and TBliS open. For polar operation TBidZ and TBIQS are closed, battery is connected between terminals 6 and the line is connected to terminals l. The line may extend to a distant TT station or may extend to a radio transmitter or carrier terminal equipment where a radio or carrier current transmission link is employed.

When the TD is shut off, as by removal of the message tape, release current continues to operate the release magnet of the crypto unit. Since the TD rests on its stop segment contacts 6 1 of TD signal relay K202 remain closed and continuous mark voltage is applied to inner segment 106 of the crypto. This results in cipher being applied to the line which is undesirable from the standpoint of code security. Crypto disable circuit 20 operates, after an interval of thirty-three seconds following TD shut-E, to prevent such application of code characters to the line. The thirty-three second interval is provided so that routine tape changes will not cause disabling of the crypto unit.

The disable circuit comprises tubes V304A, V304B and crypto disable relay K204. The crypto unit is disabled by a ow of current in VSMB which closes contacts t-I of crypto disable relay Kt and short circuits the M and S contacts of the crypto unit. When the TD unit is operating VSMB is biased beyond the cuto point by the negative voltage across R325. This voltage is opposed by the positive voltage across condenser C308, however, during TD operation the condenser voltage is kept at a low value by the following process: At the end of each TD step pulse Kdl is energized and contacts 4 5 open ungrounding the lower end of R327. During the ensuing crypto step pulse contacts t of crypto-step relay KI are closed and a positive pulse is applied to the grid of tube VSMA through R321 and to its anode through R328 and R329. The simultaneous positive pulses on grid and anode of this tube cause it to conduct and condenser C308 to discharge through the tube to a low value of voltage. Since these pulses repeat at the TD step frequency and since the charging path of condenser C3l8 has a high time constant, the condenser is not able to charge to a suiciently high -line break, with the received signal.

voltage to drive V304B out of cut-oif driving TD operation. However, when the TD unit is shut on the circuit through its release magnet is broken and relay KSiJI can no longer be energized. Consequently, contacts 0 5 of this relay remain closed and the lower end of K232il remains grounded so that the above mentioned positive pulses can not now be applied to the grid of V304A. Due to the high negative bias on this grid, resulting from the voltage across R324, positive pulses on the anode alone are not able to cause conduction in the tube and no discharging of condenser C308 can occur. Condenser C308 therefore begins to charge and the time constant of its charging circuit is so selected that after approximately 33 seconds the voltage on the grid of V304B has risen above the cut-oir point and crypto disable relay K201i is actuated. During the time that the crypto unit is disabled step current continues to operate its release magnet, the unit being disabled only to the extent of preventing cipher characters from being applied to the line.

Gne additional situation must be provided for in the transmitter. As long as the TD unit is operating a start pulse (space), coincident with the crypto step pulse, is included as the rst pulse in each character group. As already pointed out the distant receiving station utilizes the start pulses to synchronize the receive crypto unit with the transmit crypto unit and to correct the timing of its step pulse generating circuits. In order to continue to supply the receiving station with these pulses when the TD unit is shut olf an artificial start pulse generating circuit is provided. This circuit functions as follows: When the TD unit is shut off it comes to rest on its stop segment thus energizing coil 2 3 of relay K202 and closing contacts 6 7 thereof, the effect of the normal current in coil i 8 being overcome by the current in coil 2 3. However, when contacts 6 1 of crypto step relay KZIH are closed for the production of the crypto step pulse, R2l3 is connected in shunt to H2M and RZIE which raises the current in coil E B of relay K202 sufficiently to overcome the effect of the current in coil 2 3 and closes contacts 6 4. Since contacts B Ll of K2il2 are closed when the brush of the crypto unit passes over its start segment a space is applied to the line, as shown in Fig. 4(1)), which serves the same purpose at the receiving station as the normal start pulse.

The receiver section i3 of the TT station is shown in block form in Fig. 1 and in detail in Figs. 3a and 3b. The main function of the receiver is to keep the receive crypto unit operating in step with the crypto unit of the distant transmitting station. In addition it performs the following subsidiary functions: (1) It reshapes and deciphers the enciphered TT signal derived from the incoming receive line. (2) It produces step current pulses to operate the release magnet of the receive crypto unit. These pulses are either derived from the start pulses of the line signal or, in the case of a line break, from its own frequency dividers which are energized from the local frequency standard but are kept in synchronism, until the instant of (3) It shuts off the printer after the TD unit at the distant transmitting station is o for a predetermined length of time.

The signal input section Il of the receiver consists of signal input relay Ki, a low-pass filter incorporating elements Lllrl, 0405A and C405B, and two Shaper-clipper stages V40IA and VlilB. The wave form of the received TT signal may depart considerably from that of the transmitted signal due to various distorting factors present in the transmission link and also due to noise energy derived from the transmission link. It is the function of the signal input section to restore the received signal tosubstantially its original form. The reshaped signal appears at the anode of tube VM'IB and is shown in Fig. (a) as the enciphered letter D, assuming that at the distant transmitter the text letter was and the cipher letter A as illustrated in Fig. 4(a), (b) and (c). It will be noted that the signal at this point is inverted in phase relative to the normal transmitted signal. The operation of the signal input section is well understood in the telegraph art and need not be described in detail here.

The voltage on the anode of VIB is applied to signal relay section l I9 which comprises tube V402A and signal relay X402. This circuit reinverts the signal so that a TT signal of proper phase, as shown in Fig. 5(1)) appears at M04.

The received enciphered TT signal, of proper phase, as it appears at Jllli is applied to the inner segment [06 of receive crypto unit I9'. The receive crypto unit is identical in construction and operation tothe transmit crypto unit which has already been described in detail. If the M (mark) and S (sp-ace) contacts associated with active segments I- of the crypto unit are set by the crypto tape for the cipher letter A. as shown in Fig. 5(0) the deciphered letter Y appears at J 25 as shown in Fig. 5(11) the same laws of multiplication being followed (M M=M, M S=S and S S=M) as in the transmit crypto circuit. The 4 ms sampling pulses appearing in the signal' .at J 4M and shown in Fig. 5(19) are produced in the same manner as those appearing at J 202 in the transmitter section and are due to the presence of resistors R425 and R426 associated With signal relay KQUZ;

The deciphered signal output at J2ii5, with switch S2MY in the cipher position, as applied through bank 2B of this switch to the printer relay section IZ. If the received signal is in clear text switch S204' is placed in the text position and the signal is applied through R25land bank 2B of the switch directly to the printer relay'section. The purpose ofthis section is to supply' signal current to operate the selectormagnet of printer i-Z. It consists of relay driver stage VMZB and printer relay KES?. The TT' signal is applied to the grid of VZB and the actuating coil 2--3 of K20'l is connected in the plate circuit of this tube. The printer circuit is connected to terminals Il and l2 of terminal board TBll. The current owing in the printer magnet is of substantially the same wave form and phase as the TT signal voltage at J2t5 or, for clear text transmission, at M013. A low pass filter circuit comprising R428 and C408 is for the, purpose of preventing short time constant pulses from appearing at the gridv of V402B.

The purpose of gate circuit |122 is toseparate the start pulses from the remainder of the TT character group. This is done by making the circuit react only to the start pulsesY and rendering it insensitive to the intelligence and stop pulses'. The gate circuit acts as a positively triggered, one-cycle multivibrator, the leading edge ofl the start pulse providing the triggering impulse. The gate circuit comprises gate trigger stage' VSA,

lit)

gate clamper VMGA, cathode follower-baseline stabilizer V405, triggered pulse generator VQM'B, and short gate eliminator VMSB. The input signal for the gate circuit is applied to the grid of VisiA and is derived from the anode of V40IB in the receiver input section. This signal-is shown in Fig. 5m) and, as has already been pointedv out, is inverted.

VLS'SBA is biased at about -30 volts, which is beyond the cutoff point, and is normally nonconductive. ViiliB is normally conductive. Clamping tube VltA, which obtains its bias from thedrop across R045 and the negative source attached thereto, is biased beyond cut-off when VQMB is conductive and therefore is normally nonconductive and exerts no clamping action. Vii'SB is biased by the voltage drop across R431 and the negative source attached thereto and is normally conductive. VfiSA is normally fully conductive so that the potential of its cathode relative to ground is about volts. The above designated normal conditions are those existing just prior to the leading edge of a start pulse.

The input signal is irst diierentiated by C409- Rllv3f0 to produce the series of sharp pulses shown in Fig. 5(e). The positive pulse due to the leading edge of the start pulse produces maximum conduction in V4 03A. The resulting drop in plate voltage is applied directly to the grid of cathodefollower stage VA which causes the potential of its cathode, at which point the gate voltage is developed, to drop to itsV minimum value of about +5()v volts. This minimum value is fixed by baseline stabilizer VfSEB which conducts continuously and establishes the minimum value of' current through R-. The negative-going voltage at the cathode of V405A isV applied throughl Cdl-2 and R642 to the grid of pulse generator stage VEMB.

The grid ofl V'li'B is connected to positive potential through RMIZ, Rill-'l and R440. Therefore, it is normally maintained through grid current flow at a potential only slightly positive relative to the cathode. Condenser CM2' normally has a charge with the polarity indicated" obtained fromV the voltage drop across R435, the condenser having charged through the grid circuity of VGMB; Since the voltage across CM2 cannot change instantaneously the drop in voltage of the cathode of VEA pulls the gridof VliULiB down with it to a potential of about 90 volts, the 100 volt drop of the cathode lessv about l0' voltsV across RME due to grid current. This actionA cuts VllB' ofi. The wav-e forms on the anodey of V403A, the cathode of VilSA, the grid of VliB andthe anode of VliB are shown in Figs. 5(1), (y), (h) and (i), respectively.

When VfifiB becomes nonconductive a posi.- tive-goingA voltage, from potential divider R444- Rt, is applied to the gri-d of VA. This voltage is of suilicient magnitude to produce full conduction in this, tube. The grid voltgae of VlllA is shown in Fig. 5(7). The low impedance of thisv tube when fully conductive effectively clamps the anode of Vfit'A to ground and thereby prevents a rise in its potential at the termination of the start pulse of' suiiicient magnitude to cause conduction in Vflt'A, which, is now cut off by the voltage across Rj35. The slight negative dips in the anode voltage of ViSA which occur in spite of clamping tube Vt'tiA when subsequent positiveA pulses are applied to the grid ofA the tube do not appear at the cathode' of VA also. because this tube is now cut off.

As soon as the above described events have taken place condenser CM2l starts to discharge through Rl135, the +150 volt supply, R415() and Reti, and the potential of the grid of VMMB starts to rise toward meent-01T points. When the grid potential reaches cut-off tube VMMB starts to conduct, shortly thereafter reaching full conduction with the grid at its normal slightly positive potential relative to the cathode. The time constant of the condenser discharge circuit may be adjusted at Rfid@ and is set to such a value that conduction in tube V464B occurs during the stop pulse of the TT character group, a suitable time being approximately 142 ms. after the leading edge of the start pulse. Conduction in VflllliB lowers its anode potential and as a result the grid potential of VllA is lowered below the cutoff point, thus removing the clamping effect of this tube. As a consequence the anode potential of VliBA rises to its maximum value and the grid and cathode of V45A follow suit. The rise in voltage of the cathode of VllllA to its maximum value terminates the gate. Tube WlSA is now in an operative condition and ready to initiate the generation of another gate at the leading edge of the next start pulse.

YShort gate eleminator stage VllSB is used to guard against a line break of short duration which may occur between the end of the gate pulse, when VffltA is rendered sensitive, and the leading edge of the next start pulse. Such a line break could cause a positive pulse to appear at the grid of VtltA and thus undesirably trigger the gate circuit. Ii this should be allowed to happen the resulting gate would probably be too short since it is unlikely that the charge on condenser CM2 would have had time to return to normal following the termination of the preceding gate. A below normal charge on C412 would result in a negative voltage on the grid of Vllill-lB of smaller amplitude than normal which,in turn, would not keep VMMB cut oi for the full gate time. Consequently, VilB would generate a gate of time duration shorter than normal. Such a gate is undesirable since it could change the timing of the crypto step pulse, as will be seen later, and thereby disrupt synchronization. Stage 41.33B prevents this by applying a negative pulse to the grid of VlA to cancel out any positive voltage on this grid caused by a short time break at the time mentioned, thereby preventing the circuit from generating a gate until the next start pulse arrives.

The action of the short gate eliminator stage is as follows: During the gate, VttB is cut off by the negative bias derived from the source of negative potential to which its grid is connected through RGS?. At the end of the gate the rising potential of the cathode of VIIBSA is applied to the grid of lfd-@3B causing this tube to conduct and its anode potential to drop sharply. This drop in voltage is fed to the grid of VllllSA through diierentiating circuit CdM-R43@ in the shape of a sharp negative going pulse, visible in Fig. 5(8), which cancels out any positive voltage on the grid of WNBA caused by a short line break at the time mentioned.

A line break of long duration, i. e. extending over at least several character group transmissions, usually results in improper gate generation for the rst several character groups following repair of the break. This is due to the fact that tube VSA of the gate circuit remains sensitive during the break and is triggered by the first positive pulse following repair of the break, which usually is not a start pulse. A typical example of the operation of the gatecircuit under this condition is shown in Fig. 50c). Assume that a line" break is repaired during transmission of the fourth character pulse of the letter Y. Since this pulse is positive the gate circuit will be immediately triggered to produce a gate of the normal 142 ms. duration. This gate, designated gate l in the drawing, ends during the second character pulse of the succeeding letter D. The next occurring positive pulse is pulse 5 of letter D which initiates gate 2 that ends during pulse 3 of the letter Af Since the next positive pulse to occur is the start pulse of the character group following the A group, gate 3 and all succeeding gates will be properly related to their respective character groups. Therefore, following repair of a line break, the gate circuit soon settles itself to produce the desired gate pulse. The maximum possible number of successive character groups, regardless of their order, that are needed to settle the gate circuit after a line break has ended has been calculated to be twelve.

The circuit details of the gate ll-in section 23 of Fig. l are shown in Fig. 3a.. The purpose of this circuit is to generate two voltages for actuating the line break control section to be described later. The first of these voltages is an inversion of the gate voltage and concurrent therewith. The second is a positive square wave initiated at the end of the gate and having a duration equal to the interval, 33 ms., between normal gates. The gate iill-in circuit comprises tubes VliGA and VQSB and its operation is illustrated by the wave forms of Fig. 6. The gate voltage appearing at the cathodes of Vil is applied through R and RME to the grid of VQQSA. The grid of this tube is also connected through Rtll to a source of negative bias of sufficient magnitude to cut the tube off during the gate. However, at the end of the gate the sudden rise in voltage of the grid of VllcA produces a corresponding sudden drop in voltage of the anode of this tube which is transmitted through C613 and Rft to the grid of VQESB, which is fully conductive, and drives it far below the cut-oi point. The discharge current of CMS owing through Rlil maintains 740513 in cut-oli for a length of time depending upon the time constant of the discharge circuit. As C4 I 3 discharges the grid of VtB rises toward the cut-off potential and when this point is reached the tube again becomes fully conductive. The result of this process is a positive square wave of voltage on the anode of VMSB which, by proper adjustment of the above mentioned time constant, is made to equal the normal time interval between gate pulses (33 ma). This voltage is shown in Fig. 6(6) and is used, along with the inverted gate voltage shown at (c), in the line break control circuit.

The function of the line break control section i212 of Fig, l is to provide D. C. voltages at different levels to activate the gate inverter E25 and the binary control 26, to be described later, for the two conditions of TT operation (the normal line condition and the line break condition). The line break control section comprises mixer stage V497, line break clamper control stage V408A and line break indicator control stage VZIA, and is shown in detail in Fig. 3b. The wave forms occurring in this circuit are shown in Fig. 7. The voltages provided by the line break control section are derived from a potential divider connected between a point at +300 volts and another point |21 at -150 volts and consisting of the space path of VliSA, R662, R453 and RAM. The voltage at point 428 is applied to the l gate inverter and that atr point 129i to the..,binary control section. When the voltage on the grid of VGBSA. which acts as a cathode follower,y has a lowvalue, for example volts relative to ground, the cathode of this tube likewise has av potential of substantially +10 volts relative to. ground and points t28 and 129; havelow voltages, for example +50 and +60, respectively, relative to ground. If the grid potential of V4G 8A raised to a higher value, for example +150 volts, the cathode likewise assumes. this higher voltage and points 128 and 129 as a result assume higher potentials of for example +35 and +20 volts respectively. It is desired that the line break con. trol circuit produce the lower values of potential at points 12,3 and 125i during the presence of a normal line signal, when a gate is generated, and that it produce the higher values of potential at these points during a line break, when no gate is generated. The circuit accomplishes this function as follows: The voltages appearing at the anodes of VMSA and VdiiB are applied to the grids of VlilliB and VlA, respectively. Taking into account the potential reduction of the coupling circuit and the bias on Vfl the two grid voltages vary over the range shown in Fig. 7(a) and (h). The voltages represented at (a) and (b) are those obtained during normal operation and with a gate of normal length (142 ms.) being generated. Since a grid potential of +0.1 volt is suincient to produce full conduction in VMHA or VlilB it is seen that for this condition either one or the other of the tubes is fully conductive and the voltage of the parallel connected anodes has the low value of +10 volts, as shown in Fig. '7(c). This voltage is applied to the grid of VMBA and results in the lower values of voltage at points 28 and E29. During a line break no incoming signal is received and consequently no gate is generated. In the absence of a gate VtiiA and V406B of the gate fill-in circuit (Fig. 3a) remain a fully conductive state and their resulting low anode potentials cause the grid potentials of ViQ-A and VtiillB to remain at their lowest value which,v in the example shown, is +40 volts. At this grid potential VMHA and V 461B are both cut off and the potential of their anodes has its maximum value of +150 volts. This potential is applied to the grid of V4il8A and results in the higher values of voltage appearing at points 128 and 129.

rhe V43? anode voltage is also applied through an integrating circuit, consisting of R461, C414 and C415, to the grid of line break indicator control tube V2 EGA. During normal operation with a gate of normal length, the +10 volts at the V491 anodes is insuiicient to light the indicator lamp E216 in the cathode circuit VZEQA, During a line break, the +150 volts at the anodes. of V491 is sumcient to light E2 1d continuously thus giving an indication of the line break. The indicator lamp also gives a flashing signal in the presence of a line signal if the gate circuit is producing a gate that is of too short duration. This is accomplished as follows: A narrow gate causes the positive-going pulses in the wave applied to the grid of V4B'EA, shown in Fig. 7(d) to occur earlier than normally since they correspond to the gate fill-in pulses, Fig. 6(6) which are initiated at the end of the gate. Further, the duration of these pulses does not change from the 33 ms. xed duration of the gate fill-in pulses. The voltage wave applied to the grid of V40'1B in the presence of a narrow pulse is shown in Fig.. 7(6). From these Wave forms it is apparent that an interval exists betweerlthe endl of the, cate llnl pulse as seenfin (d) and the beginning of; the. gate as s een in (e). during which both Vllill'fA and VillB. are cutl off.. This.V results positive voltage pulses on the anodes; of V401, as seen in (f), which, when applied to the grid. of VtiilA, cause flashing of' lainpEZj- HJE indicating improper adjustment of the gte flfllit.v

The gate inver-ter section 1215 of Fig. 1 performs two. functions- First, it inverte the gate pulses so that they are applied tothe crypto step input circuit with the proper` polarity. Second, it prevents random pulses, which appear at the output of the gate. section during a line, break, from aieetng the crypto step section, 'Ijhe gate inverter section comprises; tubes Will-2A and VlieB, and is Shownin detaln Eig. Se.. ViB acts as a elempingV dev-ice. for Vitae such. that when ViSB is conductive the anode of VliSlA is clamped tc ground. thus rendering this Stege inoperative. Thegrid voltage for V4 1}.9B is derived from point 1.28:. the, ling breek; CQIlfQl SQCOI! (Fig 312% wf e normal. operation the potential ef, this point has its lower valueof .-50 volts which cuts tube; V4D3B off andL allows normal operation of VM'SA. Under these conditions V 589A inverts the gate pulse derived, from the cathodes of V45 and applies the' inverted gate to the crypto step input circuit. Duringaline break, however, the potentialof the above mentionedpoint has its higher value of +35' volts whichproduces full conduction in VMQB and renders VllQA incapable of transmitting any signal from the gate circuit to the Crypto sten section.

As stated above, during normal operation an invertedl gate pulse is applied to the Crypto input circuit from the anode of gate inverter stage V409. Thiswave form is shown: at; (c) in Fig. 8 in which the received TT Signal and the sate are shew-.1.1 at (a.) and (b) for reference purposes. Also, there is. applied atall times to the crypto. input circuit a. square wave havingthe same frequency as the gate wave, namely 5.7 cps., and derived from the last binary frequency divider of the three binary dividers making un thev frequency divider Section 13G. as shown in Fig. 1. This wave is shown in Fig. Sicili and is derived by three successive binary divisions of a 15.8 cps. square wave derived from the frequency standard generator 1 l of Fig. 1. Moreover, during, normal operation, binary control circuit of Fig. l operates with each generated gate pulse. t0 synchronize the square. Wave (d) with the gate. The accuracy of the synchronizationis such that, for reasons to be explained later., the lag of the positive going edge of wave (d.) relative to the leading edge of the sate, indicated by L in Eig. 8', does not exceed the period of the 45.8,cpssquare. wave, which is 22 ms. During normal operation the positive-going edge of wave (c) is used to generate the crypte Step pulse- During a` line break waveV (c) is not present and the positive-going edge of square wave (d) is utilized for this purpose.

The frequency divider section is shown in detail in Fig. 3a and comprises binary dividers V411, V413 and V415. The 45.8 cps. square wave derived from the frequency standard is applied through differentiating circuits to the grids of both sections of VH1. Due to the differentiating circuits the positive-.going edges of the square Wave produce sharp positive pulses on both grids and the negative-.going edges produce sharp negative pulses on beth grids. Accordingly, for each cyclev of the square wave there are one positive pulse and one negative pulse applied to the grids. V4 1.1

is connected in a circuit having two stable conditions, commonly referred to as an Eccles-Jordan circuit, in each of which one tube is fully conductive and the other cut off. However, the circuit is designed so that it can be switched from one condition to the other only by application of a negative pulse to 'the grid of the conductive tube. This is accomplished by biasing the grids so negatively that a positive pulse is unable to produce conduction in the tube that is cut off. Since the circuit is switched only once for each cycle of the incoming square wave, the output square Wave, derived from the anode of V4! IB, has one-half the frequency of the input wave. The remaining two E-J circuits comprising tubes VMS and V415 are identical to that comprising tube VliII and likewise act to divide the applied frequency by two. Each of these circuits is triggered by the output wave of the preceding circuit which is applied to its grids throagh buffer-inverter stages VMBB or VlliflB. The purpose of the bufferinverter stages is to permit all three divider circuits to switch simultaneously following a line break, as will be explained later. The output square wave or" the frequency divider section is taken from the anode of VllIEB and has a frequency of one-eighth the 45.8 cps. applied wave or approximately 5.7 cps.

The function of the binary control section |25 of Fig. l is to regulate the frequency divider section. The binary control section is shown in detail in Fig. 3a, and comprises triggered pulse generator ViiiiA, line break clamper V408B, and three binary pre-Setters V4 I 2A, V4 MA and V4 I UB. The grid voltage of 174MB in the gate fill-in circuit, shown in Fig. 6(01) and reproduced 8(6) for reference purposes, is applied to the grid of VllilA. The effect of this voltage is to cut off VlilA between gates thus allowing its anode voltage to assume its maximum value of +150 volts. The anode of VMEJA is directly coupled to the grids of pre-setter tubes VMIlB, V4I4A and VliZA with the result that the grid voltages of these tubes are as shown in Fig. 8(1). Due to the high voltage on the grids of the pre-setter tubes during the 33 ms. intervals between gate pulses these tubes are driven into current saturation and the voltage of their anodes drops to near zero. Since the anodes of V4IIlB, VMA

and Vil-EEA are directly coupled to the anodes of binary divider tubes VIEB, VllISB and VAI IB, respectively, the voltages of these anodes are likewise reduced to nearly zero with the result that the three binary dividers are simultaneously and similarly preset during each interval between gates to the stable condition in which the A tubes are nonconducting and the B tubes are conducting. During gate intervals the voltage on the grid of ViiIA is ,-l).1 volt which causes plate current saturation and an anode voltage that is too loiv to produce conduction in the binary presetters. Consequently the binaries are permitted to divide freely during the gate intervals. The binaries are permitted to divide freely also during a line 1break. The reason for this is that during a line break the grid of clamper VllilB, which derives its potential from point I 29 in the line break control section (Fig. 3b), has its higher value (+26 volts) which saturates this tube and thereby clamps the anode of VAIEJA to substantially ground potential. The resultinglow potential on the grids of pre-setter stages V4 I 0B, V4 I 4A and V AMBA is insufficient to cause conduction in these tubes and the binary dividers are oonsequently free to operate.

As stated above, during normal operation, al1 three binary dividers are preset to the same condition, i. e. the A tubes nonconductive and the B tubes conductive, during each of the 33 ms. intervals between gates, or, in other words, during each gate fill-in pulse. When a line break occurs the last received start pulse of the TT signal initiates a final gate of normal 142 ms. duration and the trailing edge of this gate initiates a final gate fill-in pulse and simultaneously therewith a final negative pulse, as shown in Fig. 8(e), on the grid of VliIA. Consequently, during the interval of the final gate ll-in pulse a nal presetting of the binaries occurs. At the end of the gate fill-in pulse the three binaries are unolamped by the three pre-setter stages and are free to divide beginning with the next negative pulse applied to the grids of rst divider stage VM I. Clamping tube VBB is held in a nonconductive state by the line break control circuit until the end of the gate ll-in pulse. At the end of this pulse, at which time the binaries have already received their final presetting, tube VfllB becomes conductive and clamps the anode of V5 I A to ground for the duration of the line break. This prevents the transmission of any spurious pulses to the pre-setter stages which might interfere with the operation of the binary dividers during a line break. Therefore, during a line break, the binary frequency divider section continues to produce a 5.7 cps. square wave at the anode of VllIo'B which is identical to that shown in Fig. 8(d) except that the small negative pulses in the negative half cycle of the wave caused by the clamping action of VIUB are absent. When a line break occurs and the binaries are unclamped in the manner described above, it is desirable that frequency division does not take place in a binary unless the succeeding binary has been unclamped rst. If this is not arranged, improper frequency division is apt to occur. It is necessary, therefore, that VliIB unclamp 'V1-H5, VlIiA unclamp V4I3 and V4I2A unclamp VFiII, in that order. For this reason the R-C time constant networks at the grids of the presetters are arranged so that the network of VllIZA has the longest time constant and that of VlB the shortest time constant.

The phase relation between the square wave output of the frequency divider section and the gate generated during normal operation is established as follows: As explained above, the binaries are preset and ready for operation at the end of the final gate ll-in pulse. The next negative trigger pulse applied to the grids of first divider stage Vlii causes this stage to switch to the condition in which Vl IA is conductive and V4IIB is nonconductive. This is accompanied by a positive-going wave front at the anode of VIH iB. This wave front is converted to a negative-going wave front by inverter VAIZB and results in negative trigger pulses being applied to the grids of second divider stage VMS. As in the first stage the negative pulses cause a switch of this circuit to the condition in which V4I3A is conductive and V4I3B nonconductive. This action is likewise accompanied by a positivegoing wave front at the anode of V4I3B which, after inversion by stage V4 IAB, initiates a similar switching action of final divider stage VMS and a similar positive-going wave front at the anode of VlB. Therefore, the application of a negative pulse to the grids of V4! i produces a simultaneous, switching action in all three binary divider stages and simultaneous positive-going wave fronts on the anodes of the B tubes in the three stages. The important point in this is that the positive-going wave front at the anode of V-LlIliB, shown in Fig. S(d), is coincident with the negative pulse applied to the grids of Vfl! I. The manner in which the binaries are preset by the binary control circuit, already explained, insures this result.

The interval L, indicated in Fig. 8(d), represents the lag of the positive-going edge of the 5.7 cps. square wave behind the leading edge of the last received TT start pulse. If a negative pulse is applied to the grids of VfflIE coincidently with the trailing edge of the gate fill-in pulse this lag is zero. The greatest possible interval of time that can occur between the trailing edge of the gate fill-in pulse and the application of a negative trigger pulse to the grids oi VME is 22 ms., the period of the 45.8 cps. square wave from the frequency standard. Therefore, L may have any value within the range -22 ms. The length of t'nne following a line break during which this initial phase relation can be approximately preserved depends entirely upon the quality of the frequency standards at the transmit and receive stations.

The function of the crypto step input section ISI of Fig. 1 is to supply the crypto step section I32 with a square voltage wave, derived from the gate inverter output wave during normal operation and from the 5.7 C. F. square wave from the frequency divider section during a line break, which has a negative-going edge that either coincides with or approximately coincides with the leading edge of the received TT start pulse or else with the time at which the leading edge would have occurred had the start puise been received. The details of this circuit are shown in Fig. 3(b). The circuit comprises the dual triode VllI in which the anodes are connected together and to a common load resistor. An inverted gate voltage derived from the anode of gate inverter VQQSA (Fig. 3a) and shown in Fig. 8(0) is applied to the grid of VQIGA. The 5.7 C. P. S. square wave derived from the anode of VIlI5B in the frequency divider section (Fig. 3a) and shown in Fig. 8(0Z) is applied to the grid of VlIGB. These two triode sections are biased so that they are saturated by the maximum voltage of square waves (c) and (d) and are cut off by the minimum voltage of these waves. During normal operation the anode voltage of VMS is as shown in Fig. 8(9) and its form is governed almost entirely by the inverted gate signal on the grid of ViIGA. The wave (d) on the grid of VMSB has little eiiect on the anode voltage during normal operation since VMBA is already saturated during the positive half-cycles of (d) and as a result very little further depression of the anode voltage can take place. However, during line break operation, the wave (c) is not present on the grid of VdlA, which is then cut oir, and therefore the anode voltage of VMS is controlled entirely by the 5.7 ms. square Wave on the grid of ViSB and has the wave form shown in Fig. SUL).

The purpose of the crypto step section I3? of Fig. 1 is to produce step current pulses for operation oi" the receive crypto release magnet. As shown in Fig. 3b the crypto step section conn prises triggered pulse generator VdilA, crypto step relay driver ViI'lB, bank 2A of receiver switch S2M and receiver stepping advance-retard switch S203. During normal operation the square Wave of voltage on the anode of VIl-If, shown in Fig. 8(g), is dinerentiated by Cilll and R593 and applied to the grid of VfIIiA which is normally at about cathode potential due to its connection to volts. Due to the limiting action of tube on positive-going voltages the positivegoing edges of wave (y) do not produce pulses on the grid. The negative-going edges of this wave however drive the grid of VIlI'IA well beyond its cut-oir point as shown at (i) in Fig. 8. With Vlll conducting, CMI, previously charged by the positive pulse, discharges through Rte holding VllIlA in cut-off. The discharging rate is justed so that after a suitable interval., for example 45 ms., the grid voltage of Vll'lr-i has risen to the cut-oli point and the tube again becomes conductive. This process produces a positive voltage pulse on the anode VilllA as shown in Fig. 8(7'). These pulses are applied to the grid of driver stage VM'IB causing pulses of current to flow through winding 2 3 of crypto step relay K202i. These pulses close contacts --l' of K-2Il8 causing step current to flow through the release magnet winding IM of the receive crypto unit and also lighting crypto step indicator lamp E2I2. The crypto step current and the anode current of ElIl'B have similar wave forms and are of the same phase, so that for practical purposes they may be genertally represented by the same wave form (k) of Fig. 8. It will be noted that the leading edge of each receive crypto st current pulse coincides with the leading edge of a TT signal start pulse. As will be seen in Fig. 4, the leading edge of each transmit crypto step pulse also coincides with the leading edge of the TT signal start pulse. Therefore the crypto step pulses at both transmitter and receiver occur simultaneously and the two crypto units are stepped in unison.

During a line break the receive crypto also stepped in unison with the transmit crypto oy a process that is substantially the same as that described above. The diierence is that during line break the inverted gate is not applied to Vll'A so that this section remains nonccnductive and the anode voltage of Vllll, shown in Fig. 801,), is that produced by the 5.7 C. F. S. square wave supplied to the grid of Vfll from the frequency divider section. The negative-going edge of the wave (h) lags that oi wave (o), obtained during normal operation, by the interval L which, as already pointed out, lies within the range 0-22 ms. Wave (h), when applied to VLSI'IA, produces voltage waves on the grid and anode of this tube and a current wave through the crypto release magnet very similar to those shown at (i) (i) and (k), respectively, the waves of course all having the above mentioned delay L. This delay, although usually present to a greater or lesser degree during line break operation, is of no consequence since no TT signal. being received and therefore exact phasing of the receive crypto is not required. To i synchronism between transmit and rec cryptos with respect to the cipher it is only necessary to insure that the receive crypto step once for each step of the transmit crypto, and the dclay L does not interfere with the accomplishment of this result. When the line signal is restored synchronization of course returns to normal.

When a line break is over the receive crypto unit continues to be stepped by the binary frequency divider output for an interval of from two to three seconds following restoration of the TT signal. The reason for this is to allow time for the gate pulse to settle to its proper position in which its leading edge coincides with the leading edge of the TT signal start pulse, as explained in connection with the gate section. This delay is accomplished by condensers Cei@ and Cell in the line break control circuit (Fig. 3c). Upon reappearance of the line signal the gate ll-in pulse again appears on the grid of ViiiA and the inverted gate pulse on the grid of VliBB of the line break control circuit so that Vlie? again becomes saturated and the potential of the grid of VliiiBA is immediately lowered to its minimum value. The rate at which the cathode of VfiSA drops in potential is determined by the discharge rate of CMS and Clil. The circuit is so designed that for an interval of two to three seconds the potentials of points 23 and E29 remain suiiiciently positive to keep clampers VMESB and VlliiSB eiiective. This prevents the gate inverter stage VQA from triggering the crypto step section and also prevents the three presetter stages VileB, Vi-.A and Velin from becoming conductive and interfering with the operation of the binary dividers during the interval. At the end of the 2&-3 second interval the voltages of points #28 and IZd will have reached a sufiiciently low value to cut oi clamper tubes VBQB and VtBBB (Fig. 3a) and render them ineffective. At this point the inverted gate pulse on the anode of VliQA is again applied to the grid of ViA in the crypto step input circuit (Fig. 3b) and takes over the function of stepping the receive crypto unit from the wave supplied by the frequency divider section. Also the gate llin pulse appearing on the anode of Vi i @A is again applied to the grids of pre-setter stages VdiB, VlA and Vii 2A which resume their already described function of correcting the timing of the binary dividers. Normal operation of the receiver is now restored.

Should synchronization between transmit and receive cryptos be lost for some reason during a line break means are provided in the receive crypto step section, for use after restoration of the line signal to manually advance or retard the receive crypto one step at a time for the purpose of restoring synchronization. This device is shown in Fig. 3b in connection with the crypto step circuit and comprises switch SMB, condensers C2|5 and Czi', and resistors R24? and R253. When S233 is in the normal position operation of the crypto step circuit is unaffected by the advance-retard circuit and Ci and C'iie are in a discharged condition due to the connection of R251 and Riss across their terminals. When S253 is in the retard position point H33 is connected through Rii, Cile and R2i8 to 300 v. Immediately upon closure of S233 the potential of point 33 is lowered to its minimum value, which is considerably below the cut-oii point for VMlB, by the charging current of C2ii iiowing through RES?. As C286 charges the potential of the grid rises, however, the circuit time constant is made such that ViiB remains in cut-off for 1'? 5 ms., the period of one TT signal. Consequently, the stepping pulse applied to the grid of Vi'lB during this interval is not transmitted by this tube and the receive crypto loses one step. C2 l t charges comple'tely in approximately 175 ms. and the potential oi point E33 returns to normal so that only one step is lost for each actuation of SEQ@ to the retard position. Actuation ci S2233 to the advance position connects point ist through Ril, C215 and R241 to +300 v. This results in an immediate increase in potential of this point, due to the flow of charging current through R501, which keeps VI'IA continuously conductive and the crypto release magnet continuously energized for a period determined by the time constant of the C2i5 charging circuit. This allows the crypto unit to run freely, and since the free running cycle is somewhat less than the normal cycle, due to the absence of stops, the receive crypto unit gradually gains on the transmit crypto unit. The size of C2l5 is so selected that the crypto release magnet remains energized for suflicient time to permit the receive crypto unit to gain one step. At the end of this interval CZIE becomes fully charged and the potential of point |33 returns to normal so that only one step is gained for each actuation of S263 to the advance position.

The printer shut-off section I3 of Fig. i prevents the printer from functioning when the TD unit of the transmitting station is turned oi. This circuit, which is shown in detail in Fig. 3b, includes mixer stages VMS and VMS, 25-second delay clamper VZllA, 25-second delay control V420B, 2-second delay control VliQiA, printer shut-off driver Vii2lB, and wafer 3A of S204.

Shut-off is accomplished by the conduction of V42IB. When this occurs current continuously nows through the 2 -3 winding of Kit?. As a result armature E is closed to contact l and remains there during the conduction period causing a current to flow through the printers selector magnet. The motor of the printer then continues to operate but no printing takes place. In this manner, the printer is prevented from reproducing the garble resulting from the deciphering of the artiiicial start pulses received when the TD is turned ofi". This action does not take place until 27 seconds have elapsed from the time the TD unit is shut ofi. This delay is incorporated to prevent the printer from being shut oi when the sending operator has to turn oi the TD unit momentarily, such as for a change of message tapes.

The operation of the printer shut-off section may be understood by reference to the wave forms of Fig. 9. The voltage applied to the grids of VMBB and VlB is derived from the anode of V4 I 1A in the crypto step section and has the form shown at (a). The input to the grid of VlilA comes from the output of Velilla in the receiver input section (Fig. 3a) which, during normal operation, may be any TT character groups such as shown at (b). Due to integrating network R5l-Cdlt2, the Wave form cn this grid is as shown at (ic). The voltage on the grid of ViSA is derived from the voltage on the armature of Kme, shown at (d). Due to the integrating network comprising Ciii associated resistances, the resulting wave form on this grid is as shown at (e). The voltages (c) and (a) on the grids of VMBA and VMSB, respectively, are mixed by VMS to produce the wave form shown at (f) on its anodes. Similarly, the voitages (e) and (a) on the grids of VMSA and VMBB, respectively, are mixed by VMS to produce the Wave form (g) on its anodes. Wave forms result from the fact that when either of the grids of V4 I 3 or VQ i 9 are at their maximum voltage (-l-O.l volt) the tube saturates and the parallel connected anodes have their minimum voltage.

The output of V4 l 9B, wave form (y) is coupled to the grid of VMB through C46@ and Rfi?, causing this tube to conduct during the positive pulses of the Wave. This intermittent conduction of VAZQB, which is in shunt to CME, together With the long time `constant of the condenser charging circuit prevents CME from charging to the point at which VfZuA conducts. Therefore, with VQZUA nonconductive the Wave (f) on the anode of V418 is applied to the grid oi ViZIA causing intermittent conduction of this tube which, as in the case of V4`20B, prevents Clit@ from charging to the point at which Vdi. IB conducts. Therefore, during normal operation, VII2IB remains cut off and the printer operates normally.

When the TD at the sending station is turned oir cipher continues to be sent over the line for about 33 seconds as explained earlier. The received cipher groups are mixed with the same cipher combinations in the receive crypto and the receive mixer section. The result is a letters combination of all marks for the intelligence pulses and a space for the start pulse. This Wave, as it appears on the grid of VIISA, is shown in Fig. 9(h). With Waves (a) and (h) on the grids of Vfiig the anode voltage of this tube has a constant low value as shown at (i). With the plate voltage of VM@ constant no positive pulses are applied to the grid of VIiZB and this tube remains in cut off. With V420B thus cut oif Cilli begins to charge through REZI After 27 seconds, as determined principally by the time constant of R52 I-Cliii, the voltage across Cat5 reaches such a value that VliEA becomes conductive. With this tube conducting the plate of VMS is clamped and voltage variations can no longer be applied to the grid of V42 IA. As a result V552 IA remains in cut-off and CMS is permitted to charge. In approximately 2 seconds from the time VdilA conducts the charge on C448 becomes large enough to permit V42 IB to conduct which, acting through K253i, shuts oii the printer. Printer shut off is therefore accomplished -i-2 or 27 seconds after the TD at the sending station is turned off.

After 33 seconds the circuit conditions change. Cipher is no longer sent through the transmit line. Start pulses only, supplied by the articial start pulse circuit in the transmitter, appear on the line. As a consequence, Wave form (h) appears at the grid of VlIBA and Wave form (a) at the grid of V4 I 8B. The result is a constant loW voltage on the anode of VMS such as formerly i.

occurred on the anode of VMS and shown in 9(1'). Since no voltage variations can be applied to the grid of V42IA under this condition also, this tube remains cut oii and VliZiB as a result continues to conduct. The printer consequently remains shut off. During this period cipher derived from the receive crypto unit is applied to the grid of VdIQA. The resulting positive pulses on the anode of Vl I Q cause inter- -iiittent conduction in VliZilB, Which prevents uninterrupted charging of CMS so that VIi2EiA remains cut off.

When the TD at the transmitter is again turned on it is necessary that the printer shut-off circuit be deactivated before the TT signal appears at the receiver. As already stated, when the TD is shut off the transmit crypto unit continues to send cipher for about 33 seconds after which it is disabled except for the start pulses which continue to be sent. After the 33 second interval these articial start pulses operate through V4 I 8 to maintain printer shut-off. When the TD at the sending station is turned on the control arrangement is such that the crypto disable circuit is immediately deactivated but a delay of about 2 seconds is introduced before TD stepping begins. This permits the transmit crypto to put cipher on the line for about 2 seeonds before appearance of the first TT signal. These cipher signals applied to VilIA produce positive pulses on the anodes of VISIE and on the grid of V42 IA thus discharging Clll. As a result VdZIB is out 01T and the printer becomes operative to reproduce the first received TT signal.

We claim:

l. A cryptographic teletypewriter communication system comprising `a transmitting station, a receiving station and a transmission link between said stations, said transmitter station comprising a transmitter-distributor unit, a transmit cryptographic unit of the on-line synchronous type and a frequency standard, means controlled by said frequency standard for stepping said transmitterdistributor and transmit cryptographic units in synchronism, said receiving station comprising a receive cryptographic unit similar to said transmit cryptographic unit and a frequency standard of the same frequency as that at said transmitting station, means in said receiving station responsive to the received teletypewriter signal for stepping said receive cryptographic unit in synchronism with said received signal, means in said receiving station responsive to the received teletypewriter signal for synchronizing the frequency standard at said receiving station with said received signal, and means in said receiving station operative in the absence of a received teletype- Writer signal for stepping said receive cryptographic unit in synchronism with the frequency standard in said receiving station.

2. A cryptographic teletypewriter receiving station comprising a receive cryptographic unit of the on-line synchronous type, a frequency standard having a frequency equal to the character group frequency of the received teletypewriter signal and a recorder, means for applying a received enciphered teletypewriter signal to said cryptographic unit, means for applying the resulting deciphered signal to said recorder, means operative in the presence of a received teletypewriter signal to step said cryptographic unit in synchronism With said signal, means operative in the presence of a received teletypewriter signal to synchronize said frequency standard with said signal, and means operative in the absence of a received enciphered teletypewriter signal to step said cryptographic unit in synchronism with said frequency standard.

3. A cryptographic teletypevvriter station adapted to send and receive enciphered teletypewriter signals in cooperation with a distant si. iilar station connected thereto by a suitable bidirectional transmission link, said station comprising a transmitter-distributor unit for generating in each cycle of operation thereof a teletypewriter character group signal consisting of a start pulse, a plurality of intelligence pulses and a stop puise occurring in succession, a transmit cryptographic unit of the on-line synchronous type, a receive cryptographic unit of the on-line synchronous type, a recorder and a frequency standard, means controlled by said frequency standard for stepping said transmitter-distributor and said transmit cryptographic unit in synchronism, means for applying the output signal of said transmitter distributor to said transmit cryptographic unit, means for applying the enciphered output signal of said transmit cryptographic unit to an outgoing transmission circuit, means for applying a received enciphered teletypevvriter signal to the 

